Added temp for switch case operand, fixed compilation issues in output
This commit is contained in:
Mr-Wiseguy
parent
2300a4b6c9
commit
5d9ea96abc
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@ -24,6 +24,7 @@ namespace RecompPort {
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uint32_t addend_reg;
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uint32_t rom;
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uint32_t lw_vram;
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uint32_t addu_vram;
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uint32_t jr_vram;
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std::vector<uint32_t> entries;
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};
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@ -33,6 +34,7 @@ namespace RecompPort {
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uint32_t rom;
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const std::span<const uint32_t> words;
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std::string name;
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bool ignored;
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};
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struct FunctionStats {
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34
recomp.h
34
recomp.h
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@ -2,6 +2,7 @@
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#define __RECOMP_H__
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#include <stdint.h>
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#include <math.h>
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#if 0 // treat GPRs as 32-bit, should be better codegen
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typedef uint32_t gpr;
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@ -22,22 +23,26 @@ typedef uint64_t gpr;
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((gpr)(int32_t)((a) - (b)))
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#define MEM_D(offset, reg) \
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(*(int64_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(int64_t*)(rdram + ((((reg) + (offset))) & 0x3FFFFFF)))
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#define MEM_W(offset, reg) \
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(*(int32_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(int32_t*)(rdram + ((((reg) + (offset))) & 0x3FFFFFF)))
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#define MEM_H(offset, reg) \
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(*(int16_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(int16_t*)(rdram + ((((reg) + (offset)) ^ 2) & 0x3FFFFFF)))
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#define MEM_B(offset, reg) \
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(*(int8_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(int8_t*)(rdram + ((((reg) + (offset)) ^ 3) & 0x3FFFFFF)))
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#define MEM_HU(offset, reg) \
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(*(uint16_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(uint16_t*)(rdram + ((((reg) + (offset)) ^ 2) & 0x3FFFFFF)))
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#define MEM_BU(offset, reg) \
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(*(uint8_t*)((rdram) + (((reg) + (offset)) ^ 3)))
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(*(uint8_t*)(rdram + ((((reg) + (offset)) ^ 3) & 0x3FFFFFF)))
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// TODO proper lwl/lwr/swl/swr
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#define MEM_WL(offset, reg) \
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(*(int32_t*)(rdram + ((((reg) + (offset))) & 0x3FFFFFF)))
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#define S32(val) \
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((int32_t)(val))
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@ -104,6 +109,23 @@ typedef struct {
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uint64_t hi, lo;
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} recomp_context;
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#ifdef __cplusplus
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#define restrict __restrict
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extern "C" {
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#endif
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void switch_error(const char* func, uint32_t vram, uint32_t jtbl);
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void do_break(uint32_t vram);
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typedef void (recomp_func_t)(uint8_t* restrict rdram, recomp_context* restrict ctx);
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recomp_func_t* get_function(uint32_t vram);
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#define LOOKUP_FUNC(val) \
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get_function(val)
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -12,14 +12,16 @@ extern "C" const char* RabbitizerRegister_getNameGpr(uint8_t regValue);
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struct RegState {
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// For tracking a register that will be used to load from RAM
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uint32_t prev_lui;
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uint32_t prev_addiu;
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uint32_t prev_addiu_vram;
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uint32_t prev_addu_vram;
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uint8_t prev_addend_reg;
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bool valid_lui;
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bool valid_addiu;
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bool valid_addend;
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// For tracking a register that has been loaded from RAM
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uint32_t loaded_lw_addr;
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uint32_t loaded_addr;
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uint32_t loaded_lw_vram;
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uint32_t loaded_addu_vram;
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uint32_t loaded_address;
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uint8_t loaded_addend_reg;
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bool valid_loaded;
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@ -27,15 +29,17 @@ struct RegState {
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void invalidate() {
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prev_lui = 0;
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prev_addiu = 0;
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prev_addiu_vram = 0;
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prev_addu_vram = 0;
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prev_addend_reg = 0;
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valid_lui = false;
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valid_addiu = false;
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valid_addend = false;
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loaded_lw_addr = 0;
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loaded_addr = 0;
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loaded_lw_vram = 0;
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loaded_addu_vram = 0;
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loaded_address = 0;
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loaded_addend_reg = 0;
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valid_loaded = false;
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@ -82,7 +86,7 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const RecompPo
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reg_states[rt] = reg_states[rs];
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// Set the addiu state if and only if there hasn't been an addiu already
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if (!reg_states[rt].valid_addiu) {
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reg_states[rt].prev_addiu = (int16_t)imm;
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reg_states[rt].prev_addiu_vram = (int16_t)imm;
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reg_states[rt].valid_addiu = true;
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} else {
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// Otherwise, there have been 2 or more consecutive addius so invalidate the whole register
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@ -102,6 +106,7 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const RecompPo
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temp = reg_states[valid_lui_reg];
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temp.valid_addend = true;
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temp.prev_addend_reg = addend_reg;
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temp.prev_addu_vram = instr.getVram();
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} else {
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// Check if this is a move
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check_move();
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@ -124,14 +129,15 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const RecompPo
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if (nonzero_immediate) {
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lo16 = (int16_t)imm;
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} else {
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lo16 = reg_states[base].prev_addiu;
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lo16 = reg_states[base].prev_addiu_vram;
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}
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uint32_t address = reg_states[base].prev_lui + lo16;
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temp.valid_loaded = true;
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temp.loaded_lw_addr = instr.getVram();
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temp.loaded_addr = address;
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temp.loaded_lw_vram = instr.getVram();
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temp.loaded_address = address;
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temp.loaded_addend_reg = reg_states[base].prev_addend_reg;
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temp.loaded_addu_vram = reg_states[base].prev_addu_vram;
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}
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}
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reg_states[rt] = temp;
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@ -144,10 +150,11 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const RecompPo
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// Check if the source reg has a valid loaded state and if so record that as a jump table
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if (reg_states[rs].valid_loaded) {
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stats.jump_tables.emplace_back(
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reg_states[rs].loaded_addr,
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reg_states[rs].loaded_address,
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reg_states[rs].loaded_addend_reg,
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0,
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reg_states[rs].loaded_lw_addr,
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reg_states[rs].loaded_lw_vram,
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reg_states[rs].loaded_addu_vram,
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instr.getVram(),
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std::vector<uint32_t>{}
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);
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66
src/main.cpp
66
src/main.cpp
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@ -6,6 +6,7 @@
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#include "rabbitizer.hpp"
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#include "elfio/elfio.hpp"
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#include "fmt/format.h"
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#include "fmt/ostream.h"
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#include "recomp_port.h"
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@ -221,7 +222,16 @@ std::unordered_set<std::string> ignored_funcs {
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"__osSetConfig",
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"__osGetConfig",
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"__osSetWatchLo",
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"__osGetWatchLo"
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"__osGetWatchLo",
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// Cache funcs
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"osInvalDCache",
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"osInvalICache",
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"osWritebackDCache",
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"osWritebackDCacheAll"
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};
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std::unordered_set<std::string> renamed_funcs{
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"sincosf"
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};
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int main(int argc, char** argv) {
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@ -305,6 +315,14 @@ int main(int argc, char** argv) {
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// Check if this symbol is a function or has no type (like a regular glabel would)
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// Symbols with no type have a dummy entry created so that their symbol can be looked up for function calls
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if (type == ELFIO::STT_FUNC || type == ELFIO::STT_NOTYPE) {
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bool ignored = false;
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if (renamed_funcs.contains(name)) {
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name = "_" + name;
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}
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if (ignored_funcs.contains(name)) {
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name = name + "_recomp";
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ignored = true;
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}
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if (section_index < section_rom_addrs.size()) {
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auto section_rom_addr = section_rom_addrs[section_index];
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auto section_offset = value - elf_file.sections[section_index]->get_address();
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@ -316,7 +334,8 @@ int main(int argc, char** argv) {
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vram,
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static_cast<uint32_t>(section_offset + section_rom_addr),
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std::span{ words, num_instructions },
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std::move(name)
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std::move(name),
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ignored
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);
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} else {
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uint32_t vram = static_cast<uint32_t>(value);
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@ -325,7 +344,8 @@ int main(int argc, char** argv) {
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vram,
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0,
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std::span<const uint32_t>{},
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std::move(name)
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std::move(name),
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ignored
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);
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}
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}
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@ -333,16 +353,52 @@ int main(int argc, char** argv) {
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fmt::print("Function count: {}\n", context.functions.size());
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std::ofstream func_lookup_file{ "out/funcs/lookup.cpp" };
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std::ofstream func_header_file{ "out/funcs/funcs.h" };
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fmt::print(func_lookup_file,
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"#include <utility>\n"
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"#include \"recomp.h\"\n"
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"#include \"funcs.h\"\n"
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"\n"
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"std::pair<uint32_t, recomp_func_t*> funcs[] {{\n"
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);
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fmt::print(func_header_file,
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"#include \"recomp.h\"\n"
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"\n"
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"#ifdef __cplusplus\n"
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"extern \"C\" {{\n"
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"#endif\n"
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"\n"
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);
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//#pragma omp parallel for
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for (size_t i = 0; i < context.functions.size(); i++) {
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const auto& func = context.functions[i];
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if (!ignored_funcs.contains(func.name) && func.words.size() != 0) {
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if (RecompPort::recompile_function(context, func, "out/" + func.name + ".c") == false) {
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if (!func.ignored && func.words.size() != 0) {
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fmt::print(func_header_file,
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"void {}(uint8_t* restrict rdram, recomp_context* restrict ctx);\n", func.name);
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fmt::print(func_lookup_file,
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" {{ 0x{:08X}u, {} }},\n", func.vram, func.name);
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if (RecompPort::recompile_function(context, func, "out/funcs/" + func.name + ".c") == false) {
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func_lookup_file.clear();
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fmt::print(stderr, "Error recompiling {}\n", func.name);
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std::exit(EXIT_FAILURE);
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}
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}
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}
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fmt::print(func_lookup_file,
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"}};\n"
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"extern const size_t num_funcs = sizeof(funcs) / sizeof(funcs[0]);\n"
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);
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fmt::print(func_header_file,
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"\n"
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"#ifdef __cplusplus\n"
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"}}\n"
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"#endif\n"
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);
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return 0;
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}
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@ -31,7 +31,9 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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fmt::print(output_file, " // {}\n", instr.disassemble(0));
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}
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if (skipped_insns.contains(instr.getVram())) {
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uint32_t instr_vram = instr.getVram();
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if (skipped_insns.contains(instr_vram)) {
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return true;
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}
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@ -105,6 +107,18 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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print_line("{}{} = {:#X} << 16", ctx_gpr_prefix(rt), rt, imm);
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break;
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case InstrId::cpu_addu:
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{
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// Check if this addu belongs to a jump table load
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auto find_result = std::find_if(stats.jump_tables.begin(), stats.jump_tables.end(),
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[instr_vram](const RecompPort::JumpTable& jtbl) {
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return jtbl.addu_vram == instr_vram;
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});
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// If so, create a temp to preserve the addend register's value
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if (find_result != stats.jump_tables.end()) {
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const RecompPort::JumpTable& cur_jtbl = *find_result;
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print_line("gpr jr_addend_{:08X} = {}{}", cur_jtbl.jr_vram, ctx_gpr_prefix(cur_jtbl.addend_reg), cur_jtbl.addend_reg);
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}
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}
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print_line("{}{} = ADD32({}{}, {}{})", ctx_gpr_prefix(rd), rd, ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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break;
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case InstrId::cpu_daddu:
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@ -169,10 +183,10 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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print_line("{}{} = {}{} < {:#X} ? 1 : 0", ctx_gpr_prefix(rt), rt, ctx_gpr_prefix(rs), rs, (int16_t)imm);
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break;
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case InstrId::cpu_mult:
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print_line("uint64_t result = S64({}{}) * S64({}{}); lo = S32(result >> 0); hi = S32(result >> 32)", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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print_line("result = S64({}{}) * S64({}{}); lo = S32(result >> 0); hi = S32(result >> 32)", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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break;
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case InstrId::cpu_multu:
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print_line("uint64_t result = U64({}{}) * U64({}{}); lo = S32(result >> 0); hi = S32(result >> 32)", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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print_line("result = U64({}{}) * U64({}{}); lo = S32(result >> 0); hi = S32(result >> 32)", ctx_gpr_prefix(rs), rs, ctx_gpr_prefix(rt), rt);
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break;
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case InstrId::cpu_div:
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// Cast to 64-bits before division to prevent artihmetic exception for s32(0x80000000) / -1
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@ -232,13 +246,13 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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print_line("{}{} = MEM_WL({:#X}, {}{})", ctx_gpr_prefix(rt), rt, (int16_t)imm, ctx_gpr_prefix(base), base);
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break;
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case InstrId::cpu_lwr:
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print_line("{}{} = MEM_WR({:#X}, {}{})", ctx_gpr_prefix(rt), rt, (int16_t)imm, ctx_gpr_prefix(base), base);
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print_line("//{}{} = MEM_WR({:#X}, {}{})", ctx_gpr_prefix(rt), rt, (int16_t)imm, ctx_gpr_prefix(base), base);
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break;
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case InstrId::cpu_swl:
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print_line("MEM_WL({:#X}, {}{}) = {}{}", (int16_t)imm, ctx_gpr_prefix(base), base, ctx_gpr_prefix(rt), rt);
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break;
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case InstrId::cpu_swr:
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print_line("MEM_WR({:#X}, {}{}) = {}{}", (int16_t)imm, ctx_gpr_prefix(base), base, ctx_gpr_prefix(rt), rt);
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print_line("//MEM_WR({:#X}, {}{}) = {}{}", (int16_t)imm, ctx_gpr_prefix(base), base, ctx_gpr_prefix(rt), rt);
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break;
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// Branches
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@ -310,7 +324,6 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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if (rs == (int)rabbitizer::Registers::Cpu::GprO32::GPR_O32_ra) {
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print_unconditional_branch("return");
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} else {
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uint32_t instr_vram = instr.getVram();
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auto find_result = std::find_if(stats.jump_tables.begin(), stats.jump_tables.end(),
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[instr_vram](const RecompPort::JumpTable& jtbl) {
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return jtbl.jr_vram == instr_vram;
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@ -322,8 +335,7 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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bool dummy_needs_link_branch, dummy_is_branch_likely;
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process_instruction(context, func, stats, skipped_insns, instr_index + 1, instructions, output_file, false, false, link_branch_index, dummy_needs_link_branch, dummy_is_branch_likely);
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print_indent();
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// TODO this will fail if the register holding the addend is mangled, add logic to emit a temp with the addend into the code
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fmt::print(output_file, "switch ({}{} >> 2) {{\n", ctx_gpr_prefix(cur_jtbl.addend_reg), cur_jtbl.addend_reg, cur_jtbl.vram);
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fmt::print(output_file, "switch (jr_addend_{:08X} >> 2) {{\n", cur_jtbl.jr_vram);
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for (size_t entry_index = 0; entry_index < cur_jtbl.entries.size(); entry_index++) {
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print_indent();
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print_line("case {}: goto L_{:08X}; break", entry_index, cur_jtbl.entries[entry_index]);
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@ -383,7 +395,7 @@ bool process_instruction(const RecompPort::Context& context, const RecompPort::F
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print_branch("goto L_{:08X}", (uint32_t)instr.getBranchVramGeneric());
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break;
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case InstrId::cpu_break:
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print_line("do_break();");
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print_line("do_break({})", instr_vram);
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break;
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// Cop1 loads/stores
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@ -731,7 +743,7 @@ bool RecompPort::recompile_function(const RecompPort::Context& context, const Re
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"\n"
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"void {}(uint8_t* restrict rdram, recomp_context* restrict ctx) {{\n"
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// these variables shouldn't need to be preserved across function boundaries, so make them local for more efficient output
|
||||
" uint64_t hi = 0, lo = 0;\n"
|
||||
" uint64_t hi = 0, lo = 0, result = 0;\n"
|
||||
" int c1cs = 0; \n", // cop1 conditional signal
|
||||
func.name);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue